1. Field of the Invention
The invention relates in general to a manufacturing method of a circuit board, and more particularly to a method of manufacturing a circuit board having a circuit pattern by double plating.
2. Description of the Related Art
The manufacturing process of a semiconductor element is divided into front-end process and rear-end process. The manufacturing process before sawing a wafer into a chip is referred as the front-end process, while the manufacturing process after sawing a wafer into a chip is referred as the rear-end process. During the rear-end process, the chip is packaged to form a package structure. The chip bonding technology and the micro-system interconnecting technology are applied to the package structure for bonding and connecting the chip and other elements on a circuit board and stretching the leads out, and a plastic insulant is applied for packaging and fixing the package structure.
Of the package structure, the circuit board is used for carrying and fixing an electronic element, and a circuit pattern is formed on the surface of the circuit or inside the circuit board for connecting circuits. Meanwhile, the circuit board can be used for conducting the heat, and separating and protecting the elements. The conventional manufacturing process of a circuit board is elaborated below by accompanied drawings.
Referring to FIGS. 1A˜1G, a conventional process of manufacturing a circuit board is shown. Firstly, proceed to FIG. 1A, a substrate board 190 including a copper layer 191 and an insulation layer 192 is provided.
Next, proceed to FIG. 1B, catalyst treatment is applied to the surface of the circuit board, and a first metal layer 110 is electro-less plated thereon. The first metal layer 110 is used as an electrode for subsequent plating.
Then, proceed to FIG. 1C, the first metal layer 110 is used as an electrode, and a second metal layer 120 is plated on the first metal layer 110 totally. In the present step, the thickness of second metal layer 120 is equal to the thickness of a required circuit pattern.
Next, proceed to FIG. 1D, a dry film of photo-resist layer 150 is pasted on the second metal layer 120.
Then, proceed to FIG. 1E, the photo-resist layer 150 is patterned according to the required circuit pattern.
Next, proceed to FIG. 1F, the patterned photo-resist layer 150 is used as a mask, and the second metal layer 120, the first metal layer 110 and the copper layer 191 are etched to form a patterned circuit layer 140.
Then, proceed to FIG. 1G, the photo-resist layer 150 is removed. Thus, a circuit board 100 having the required circuit pattern is formed.
The etching process of FIG. 1F normally has to take the following parameters into consideration: the material to be etched, etching rate, etching time, etching thickness, etching selectivity, and etching concentration. The formula for etching rate is expressed as: etching rate=etching thickness÷etching time. And etching selectivity refers to the ratio of etching rate between different materials to be etched, especially the materials to be removed and the material not to be removed. Examples to the material to be removed are second metal layer 120, the first metal layer 110, and the copper layer 191. Examples to the material not to be removed is the insulation layer 192. Normally, the etching process can be divided into isotropic etching and anisotropic etching. The isotropic etching normally has a high etching selectivity such as wet etching, while the anisotropic etching has a lower etching selectivity such as dry etching.
In the step of forming the patterned circuit layer 140, the isotropic etching is applied.
Referring to FIGS. 2A˜2C, the etching process of FIG. 1F is shown. As shown in FIG. 2A, the isotropic etching may not only etch downwards but also etch horizontally towards the metal layer underneath the photo-resist layer 150. In the etching process, under the photo-resist layer 150, a part of the second metal layer 120, the first metal layer 110 and the copper layer 191 on the surface of the substrate board 190 are also horizontally etched to form a larger circuit clearance D140 as shown in FIG. 2C and FIG. 1G. Furthermore, the part of the circuit layer 140 with narrower width may disappear after horizontal etching.
Thus, the conventional manufacturing method of circuit board is incapable of effectively controlling the expansion of the circuit clearance. Moreover since the part of the circuit layer with narrower width may disappear after horizontal etching, the precision of the circuit board is largely restricted.